Gao, SuoHo-Ching Iu, HerbertErkan, UğurŞimşek, CemaleddinMou, JunToktaş, AbdurrahimWu, Rui2025-01-122025-01-122024Gao, S., Ho-Ching Iu, H., Erkan, U., Simsek, C., Mou, J., Toktas, A., Wu, R., & Tang, X. (2024). Design, Dynamical Analysis, and Hardware Implementation of a Novel Memcapacitive Hyperchaotic Logistic Map. IEEE Internet of Things Journal, 11(18). https://doi.org/10.1109/JIOT.2024.34116232327-4662https://doi.org/10.1109/JIOT.2024.3411623https://hdl.handle.net/11492/10286Currently, discrete memristors are a focal point in the study of chaotic maps. Similar to memristors, memcapacitors-another type of memory circuit component-have not received widespread attention in the design of chaotic maps. In this article, we propose a 4-D memcapacitive hyperchaotic logistic map (4D-MHLM) by integrating memcapacitors with the logistic map. The dynamical behavior of the 4D-MHLM is analyzed using Lyapunov exponent analysis, and the impact of different parameters on system performance is discussed. The complexity of generating pseudo-random sequences with the 4D-MHLM is investigated through complexity analysis, including spectral entropy complexity and C0 complexity. Notably, attractor analysis reveals a unique phenomenon of infinite coexisting attractors within the 4D-MHLM. Finally, the chaotic attractor generated by the 4D-MHLM is successfully implemented on a hardware platform. Theoretical analysis and digital circuit implementation results indicate that the 4D-MHLM exhibits rich dynamical behavior and higher complexity, offering significant value for practical applications.enDiscrete MemcapacitorDynamical BehaviorsHardware İmplementationİnfinite Coexisting AttractorsArticle11183036830375info:eu-repo/semantics/closedAccess2-s2.0-85196073094WOS:00131622780008210.1109/JIOT.2024.3411623Q1N/A